FAN6982MY【PDF 13/16 页】IC CTLR PFC CCM 14-SOICN

<

MAX

LINE BO

IAC

V

G

A

R

(3)

where V

LINE.BO

is the line voltage that trips brownout

protection, G

MAX

is the maximum modulator gain when

VRMS is 1.08V, and 159礎 is the maximum output

current of the gain modulator.

Current-Control of Boost Stage

As shown in Figure 27 the FAN6982 employs two

control loops for power factor correction, a current-

control loop and a voltage-control loop. The current-

control loop shapes inductor current, as shown in

Figure 28, based on the reference signal obtained at

1

L

CS

MO

M

AC

M

R

I R I G R

?/DIV>

=

?nbsp = ?nbsp ?/DIV>

(4)

ISENSE

IAC

VRMS

VEA

IEA

RM

R

M

RRMS1

RRMS2

R

RMS3

C

RMS1

C

RMS2

R

IAC

I

AC

V

IN

IL

R

CS1

R

F1

CF1

IMO

R

IC

C

IC1

CIC2

+

-

Drive

logic

OPFC

2.5V

RVC

C

VC1

C

VC2

FBPFC

R

FB1

RFB2

V

O

VREF

RT/CT

Figure 27. Gain Modulation Block

I

AC

I

L

1

M

MO

CS

R

I

R

Figure 28. Inductor Current Shaping

The current-control feedback loop also has a pulse-by-

pulse current limit comparator that forces the PFC

switch to turn off if the ISENSE pin voltage drops below

-1.15V until the next switching cycle.

Voltage-Control of Boost Stage

The voltage-control loop regulates PFC output voltage

using internal error amplifier such that the FBPFC

voltage is same as internal reference of 2.5V.

To improve system efficiency at low AC line voltage

and light-load condition, FAN6982 provides adjustable

PFC output voltage. As shown in Figure 29, FAN6982

monitors V

EA

and V

RMS

to adjust the PFC output

voltage. When V

EA

and V

RMS

are lower than thresholds,

internal current source of 20礎 is enabled that flows

through R

FB2

, increasing the voltage of the FBPFC pin.

This causes the PFC output voltage to reduce when

20礎 is enabled as:

1

2

(2 5 20

)

+

=

?/DIV>

FB

OPFC

FB

R

V

. - 糀 R

R

(5)

Figure 29. Block of Adjustable PFC Output

Brownout Protection

FAN6982 has a built-in internal brownout protection

comparator monitoring the voltage of the VRMS pin.

Once the VRMS pin voltage is lower than 1.05V, the

PFC stage is shutdown to protect the system from over

current. FAN6982 starts up the boost stage once the

VRMS voltage increases above 1.9V.

TriFault Detect"

To improve power supply reliability, reduce system

component count, and simplify compliance to UL 1950

safety standards; the FAN6982 includes TriFault Detect

technology. This feature monitors FBPFC for certain

PFC fault conditions.

In the case of a feedback path failure, the output of the

PFC could exceed operating limits. Should FBPFC go

too low, or too high, or open; TriFault Detect senses the

error and terminates the PFC output drive.

TriFault detect is an entirely internal circuit. It requires

no external components to serve its protective function.

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